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february 2010 doc id 1770 rev 7 1/14 1 l4925 very low drop voltage regulator features operating dc supply voltage range 6 v to 28 v transient supply voltage up to 40 v extremely low quiescent current high precision output voltage output current capa bility up to 500 ma very low dropout voltage less than 0.6 v reset circuit sensing the output voltage programmable reset pulse delay with external capacitor thermal shutdown and short circuit protections description the l4925 is a monolithic integrated 5 v voltage regulator with a very low dropout output and additional functions such as power-on reset and programmable reset delay time. it is designed for supplying microcomputer controlled systems espec ially in automotive applications. table 1. device summary package order codes tube tape and reel powerso-20 l4925pd L4925PD013TR powerso-20 www.st.com
contents l4925 2/14 doc id 1770 rev 7 contents 1 block and pin connecti ons diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2 reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1 supply voltage transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.2 application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 package informations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
l4925 list of tables doc id 1770 rev 7 3/14 list of tables table 2. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 5. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
list of figures l4925 4/14 doc id 1770 rev 7 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. powerso-20 pin connections (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. foldback ch aracteristics of v o . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. output voltage vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 5. quiescent current vs supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 6. block circuit diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 7. reset output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 8. application circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 9. powerso-20 mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . 12
l4925 block and pin connections diagrams doc id 1770 rev 7 5/14 1 block and pin connections diagrams figure 1. block diagram figure 2. powerso-20 pin connections (top view) 1.1 thermal data + - preregulator 5v vref 1.23v vz vz 2 = v s gnd 2v reset reg l4925 v o ct res d95at151 c s gnd n.c. n.c. v s v s n.c. n.c. res n.c. n.c. gnd 10 8 9 7 6 5 4 3 2 13 14 15 16 17 19 18 20 12 1 11 gnd d95at152 n.c. ct v out n.c. v out n.c. n.c. gnd connected to pin 1-10-11-20 table 2. thermal data symbol parameter powerso-20 unit r th(j-amb) thermal resistance junction to ambient 15 to 60 c/w r th(j-c) thermal resistance junction to case (max) 3.5 c/w
electrical specifications l4925 6/14 doc id 1770 rev 7 2 electrical specifications 2.1 absolute maximum ratings note: the circuit is esd protected according to mil-std-883c. according to iso/dis 7637 the transients must be clamped with external circuitry (see application circuit). 2.2 electrical characteristics v s =14 v; t j = ?40 to 125 c unless otherwise specified. table 3. absolute maximum ratings symbol parameter value unit v sdc dc operating supply voltage 28 v v str transient supply voltage (t < 1s) 40 v i o output current internally limited v o output voltage 20 v v res output voltage 20 v i res output current 5 ma t stg storage temperature -55 to 150 c t j operating junction temperature -40 to 150 c t j-sd thermal shutdown-junction temperature 165 c table 4. electrical characteristics symbol parameter test condition min. typ. max. unit v o output voltage v i = 6 to 28 v; i o = 1 to 500 ma 4.90 5 5.10 v v o output voltage v i = 35 v; t < 1 s; i o = 1 to 500 ma 5.50 v v dp dropout voltage i o = 100 ma 0.2 0.3 v i o = 500 ma 0.3 0.6 v v io input to output voltage difference in undervoltage condition v i = 4 v; i o = 100 ma 0.5 v v ol line regulation v i = 6 to 28 v; i o = 1 to 1 ma 10 mv v olo load regulation i o = 1 to 500 ma 50 mv i lim current limit v o = 4.5 v; 550 1000 1500 ma v o = 0; foldback characteristic 250 ma i qse quiescent current i o = 0.3 ma 190 360 a i q quiescent current i o = 500 ma 20 ma
l4925 electrical specifications doc id 1770 rev 7 7/14 reset v rt reset threshold voltage 4.2 4.8 v v rth reset threshold 50 100 200 mv t rd reset pulse delay c t = 100 nf; t r 100 s 60 100 140 ms t rr reset reaction time c t = 100 nf; 5 30 s v rl reset output low voltage r res = 10 k to v o ; v s = 3v 0.4 v i rh reset output high leakage current v res = 5 v 1 a v ctth delay comparator threshold 2 v v ctth hy delay comparator threshold hysteresis 200 mv table 4. electrical characteristics (continued) symbol parameter test condition min. typ. max. unit
functional description l4925 8/14 doc id 1770 rev 7 3 functional description the l4925 is a monolithic integrated voltage regulator, based on the stm modular voltage regulator approach. several outs tanding features and auxiliary functions are implemented to meet the requirements of supplying microprocessor systems in automotive applications. nevertheless, it is suitable also in other applications where the present functions are required. the modular approach of this device allows to get easily also other features and functions when required. 3.1 voltage regulator the voltage regulator uses an isolated collect or vertical pnp transistor as a regulating element. with this structure very low dropout voltage at currents up to 500 ma is obtained. figure 3. foldback characteristics of v o the dropout operation of the standby regulator is maintained down to 3 v input supply voltage. the output voltage is regulated up to the transient input supply voltage of 35 v. with this feature no functional interruption due to overvoltage pulses is generated. the typical curve showing the standby output voltage as a function of the input supply voltage is shown in figure 4 . the current consumption of the device (quiescent current) is less than 250 a. to reduce the quiescent current peak in the undervoltage region and to improve the transient response in this region, the dropout voltage is controlled. the quiescent current as a function of the supply input voltage is shown in figure 5 .
l4925 functional description doc id 1770 rev 7 9/14 figure 4. output voltage vs input voltage figure 5. quiescent current vs supply voltage 3.2 reset circuit the block circuit diagram of the reset circuit is shown in figure 6 . the reset circuit supervises the output voltage. the reset threshold of 4.5 v is defined with the internal reference voltage and standby output divider. the reset pulse delay time t rd , is defined with the charge time of an external capacitor ct: the reaction time of the reset circuit originates from the discharge time limitation of the reset capacitor ct and it is proportional to the value of ct. the reaction time of the reset circuit increases the noise immunity. standby output voltage drops below the reset threshold only a bit longer than the reaction time results in a shorter reset delay time. the nominal reset delay time is generated for standby output voltage drops longer than approximately 50 ms. the typical reset output waveforms are shown in figure 7 . t rd c t 2v ? 2 a ------------------- =
functional description l4925 10/14 doc id 1770 rev 7 figure 6. block circuit diagram figure 7. reset output waveforms
l4925 application information doc id 1770 rev 7 11/14 4 application information 4.1 supply voltage transients high supply voltage transients can cause a reset output signal disturbance. for supply voltage greater than 8 v the circuit shows a high immunity of the reset output against supply transients of more than 100 v/ms. for supply voltage lower than 8 v, supply transients of more than 0.4 v/ms. can cause a reset signal disturbance. 4.2 application circuit figure 8. application circuit diagram for stability: c s 1f; c o 10 f; esr 2.5 at 10 khz recommended for application: c s = c o = 10 f to 100 f + - preregulator 5v vref 1.23v vz vz 2 = v s gnd 2v reset reg l4925 vo ct res d95at153 vbat c s co vout res
package informations l4925 12/14 doc id 1770 rev 7 5 package informations figure 9. powerso-20 mechanical data and package dimensions outline and mechanical data e a2 a e a1 pso20mec detail a t d 110 11 20 e1 e2 h x 45? detail a lead slug a3 s gage plane 0.35 l detail b r detail b (coplanarity) gc - c - seating plane e3 b c n n h bottom view e3 d1 dim. mm inch min. typ. max. min. typ. max. a3.60.142 a1 0.1 0.3 0.004 0.012 a2 3.3 0.130 a3 0 0.1 0.000 0.004 b 0.4 0.53 0.016 0.021 c 0.23 0.32 0.009 0.013 d (1) 15.8 16 0.622 0.630 d1 (2 ) 9.4 9.8 0.370 0.386 e 13.9 14.5 0.547 0.570 e 1.27 0.050 e3 11.43 0.450 e1 (1) 10.9 11.1 0.429 0.437 e2 2.9 0.114 e3 5.8 6.2 0.228 0.244 g 0 0.1 0.000 0.004 h 15.5 15.9 0.610 0.626 h 1.1 0.043 l 0.8 1.1 0.031 0.043 n 8?(typ.) s 8?(max. ) t 10 0.394 (1) ?d and e1? do not include mold flash or protusions. - mold flash or protusions shall not exceed 0.15mm (0.006?) - critical dimensions: ?e?, ?g? and ?a3?. (2) for subcontractors, the limit is the one quoted in jedec mo-166 powerso-20 0056635 i jedec mo-166 weight: 1.9gr
l4925 revision history doc id 1770 rev 7 13/14 6 revision history table 5. document revision history date revision changes 01-oct-2003 4 first issue in edocd dms 18-nov-2005 5 added gnd pins to fig. 4 added order code and changed the formatting style in compliance with the new template 03-feb-2006 6 reset threshold voltage changed from 4.5v / 5.2v (min/max) to 4.2v / 4.8v on table 4. 09-feb-2010 7 reformatted entire document. removed pentawatt package updated ta b l e 2 : t h e r m a l d a t a
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